ü Automatically set up DC simulations using PowerTree data captured at the schematic stage to define sources/sinks, visualize the power portion of your schematics, and conduct pre-layout simulations without copper, aiding in component selection to meet design criteria

ü Identify difficult-to-locate highly resistive routing neck-downs and finds the one via among thousands that will fail under stress

ü Determine if it is possible to reduce plane layers without adding DC or thermal reliability risk

ü Assess multi-structure PCB and package designs along with chip-level information

ü Consider what-if improvement options with a unique block-diagram results view, and a range of visualization options

ü Patented automation to pinpoint the best remote sense line location

ü Comprehensive support for multi-structure designs including stacked die, multiple boards, and all popular package types

ü Optimized for flows with Allegro X Advanced Package Designer and Allegro X Design Platform

ü Accepting a mix of CAD databases where needed for multi-structure design support, including Mentor, Zuken, and Altium flows